1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more particularly to a semiconductor integrated circuit having a circuit which, when an input voltage externally applied thereto is higher than a predetermined voltage, limits the input voltage to the predetermined voltage and then applies the limited input voltage to an internal circuit.
2. Description of Related Art
A semiconductor integrated circuit has a plurality of input terminals for receiving input signals which are externally applied. In some types of integrated circuits, some of those input terminals serve as test signal input terminals used for a testing of the integrated circuit, for example. When a test mode setting signal is applied to the test signal input terminals, the semiconductor circuit is in a test mode.
An IC package in which the semiconductor integrated circuit is packed is larger in size as the number of pins thereof is larger. The price of the large IC package rises and it is difficult to make small a circuit block using such ICs. Therefore, it is more desirable that the number of the input terminals is small. Conversely, when the number of pins used is limited, it is desirable to use the external pins as effectively as possible, in order to bring about many functions of the IC package used. As a result, one input terminal is used for receiving both an ordinary input signal and a test mode setting signal.
In such semiconductor integrated circuit, an input circuit for detecting an ordinary input signal such as a TTL level and a high voltage detection circuit for detecting a test mode setting signal at a high voltage, are both connected to one input terminal. The input circuit is capable of outputting a logic "0" or "1" level signal according to the potential of the ordinary input signal. In the case that the voltage of an input signal ranges between 0V and 5V, a switching threshold of the input circuit is typically near +1.5V in order to respond to standard TTL input voltages. When the ordinary input voltage is lower than +1.5V, the output of the input circuit is a logic "0". When the ordinary input voltage is higher than +1.5V, the output of the input circuit is a logic "1". The high voltage detection circuit detects a test mode setting signal of 12V, for example. The high voltage detection circuit have a very high switching threshold, e.g., + 9V. When the input voltage is lower than +9V, the output of the high voltage detection circuit is a logic "0". When the input voltage is higher than +9V, the output of the high voltage detection circuit is a logic "1". Accordingly, when a test mode setting signal of 12V is applied to the input terminal, the high voltage detection circuit generates a high voltage detection signal of a logic "1". When the high voltage detection signal is a logic "1", the semiconductor integrated circuit is in a test mode. When the test mode setting signal at a high voltage is not applied to the input terminal, the high voltage detection circuit generates a logic "0" signal. When the test mode setting signal at a high voltage is not applied to the input terminal, the semiconductor integrated circuit is not set in a test mode, and operates in a normal mode.
MOS transistors in the semiconductor integrated circuits have become smaller and smaller in recent years in order to achieve higher integration densities and to reduce costs. Progress in microfabrication necessitates the thinning of the gate insulating films of the MOS transistors formed on a semiconductor chip. The reason for this is that the shorted channel length of the MOS transistor resulting from microfabrication needs a thin gate insulating film, in order to keep good transistor characteristics. But the thinner gate insulating film causes the lower breakdown voltage of the gate insulating film. In the case of microfabricated semiconductor integrated circuits, therefore, there is a danger that the high voltage test mode setting signal applied to the input terminal may damage the gate insulating film of the MOS transistor in the input circuit.
At present, MOS transistors whose gate insulating film is 200.ANG. thick has been successfully developed and gradually put into practice. When a high voltage of 12V, for example, is applied to the gate of such a transistor, an electric field applied to the gate insulating film reaches 6MV/cm. Under such an electric field, no breakdown of the gate insulating film of the transistor might occur but degradation of the insulating performance of the gate insulating film would inevitably occur. Variance in the process parameters in the manufacturing stage of semiconductor integrated circuits would cause defects in the gate insulating films of the manufactured transistors. Such defective gate insulating films would be damaged by supplying the 12V voltage.
The breakdown problem of the gate insulating film may easily be solved by lowering the voltage value of the test mode setting signal. This measure, however, creates the following problem. When the voltage value of the test mode setting signal is lowered, the switching threshold to define the logic "0" and "1" levels in the high voltage detection circuit must also be lowered, in order to detect the lowered voltage of the test mode setting signal. This results in decreasing the difference between the switching threshold of the input circuit and that of the high voltage detection circuit. With such a decreased difference, when the input signal voltage instantaneously rises due to noise for example, the high voltage detection circuit may mistakenly recognize that input signal as a test mode setting signal, so that the semiconductor integrated circuit operating in a normal mode would be mistakenly set in a test mode. The input signal is inevitably accompanied by an overshoot. The overshoot is particularly high when the input signal abruptly rises. If the switching threshold of the high voltage detection circuit is low, such a large overshoot would also be mistakenly detected as a test mode setting signal. For the above reasons, the use of a low test mode setting voltage is undesirable.
As described above, the approach in which one input terminal is used for two circuits with different switching thresholds involves difficulties in practical use due to the above problems: the breakdown of the gate insulating film of the transistor, and the erroneous operation of the high voltage detection circuit.